As is called a ubiquitous information society, in recent years, an environment has been managed so that one can access the information network whenever and wherever he/she likes. In such an environment, an individual authentication technique is attracting attentions, such that an ID (identification number) is assigned to each object; therefore, the history of the object is clarified and the manufacturing, management, or the like is facilitated. In particular, an RFID (Radio Frequency Identification) technique with the use of a semiconductor device capable of communicating data wirelessly, such as an RFID tag (also referred to as an IC tag, an IC chip, an RF (Radio Frequency) tag, a wireless tag, an electronic tag, and a transponder), has come into use.
A general configuration of a semiconductor device capable of communicating data wirelessly will be explained with reference to FIG. 2.
A semiconductor device 101 capable of communicating data wirelessly includes an antenna 102 and a semiconductor integrated circuit 111. Circuits in the semiconductor device 101 are separated into an analog portion 914 and a digital portion 915. The semiconductor integrated circuit 111 has circuit blocks such as a high frequency circuit 103, a power supply circuit 104, a reset circuit 105, a clock generation circuit 106, a data demodulation circuit 107, a data modulation circuit 108, a control circuit 109, and a memory circuit 110. The power supply circuit 104 has a circuit block such as a rectifier circuit 112, a storage capacitor 113, and a constant voltage circuit 114.
Next, an operation of the semiconductor device 101 shown in FIG. 2 will be explained with reference to a timing chart of FIG. 3.
A wireless signal like A′ in FIG. 3 is received from the antenna 102 in FIG. 2. The wireless signal A′ is transmitted to the power supply circuit 104 through the high frequency circuit 103 in FIG. 2. The wireless signal A′ is inputted into the rectifier circuit 112 in the power supply circuit 104. The wireless signal A′ inputted into the rectifier circuit 112 is rectified and further smoothed by the storage capacitor 113. Accordingly, first high power supply potential (hereinafter, referred to as VDDH) is generated by the power supply circuit 104 (B′ in FIG. 3). In addition, the power supply circuit 104 also generates second high power supply potential (hereinafter, referred to as VDD) from VDDH by the constant voltage circuit 114 (C′ in FIG. 3). VDD is potential lower than VDDH. Note that, in a plurality of circuits constituting the semiconductor integrated circuit 111, low power supply potential (hereinafter, referred to as VSS) is in common, and GND can be used, for example. A first DC power supply voltage corresponding to a potential difference between VDDH and VSS and a second DC power supply voltage corresponding to a potential difference between VDD and VSS are supplied to the plurality of circuits (the analog portion and the digital portion) constituting the semiconductor integrated circuit 111. The first DC power supply voltage is a voltage higher than the second DC power supply voltage. Two of the DC power supply voltages which are different in voltage from each other (hereinafter, also referred to as two kinds of DC power supply voltages) are generated by the power supply circuit 104.
In addition, a signal transmitted to the data demodulation circuit 107 through the high frequency circuit 103 in FIG. 2 is demodulated like D′ in FIG. 3 (a demodulated signal 911). The demodulated signal 911 is inputted into the clock generation circuit 106, and the clock generation circuit 106 outputs a clock 912. Further, a signal is inputted into the reset circuit 105 through the high frequency circuit 103, and the reset circuit 105 outputs a reset signal 913. The reset signal 913, the clock 912, and the demodulated signal 911 are transmitted to the control circuit 109. Then, the signals transmitted to the control circuit 109 are analyzed by the control circuit 109. According to the analyzed signals, information stored in the memory circuit 110 is outputted. The information outputted from the memory circuit 110 is encoded by the control circuit 109. Furthermore, the encoded signals are inputted into the data modulation circuit 108 and transmitted with the wireless signals by the antenna 102.
A configuration in which two kinds of DC power supply voltages are generated using the received wireless signals is described in Reference 1: Japanese Patent Application Laid-Open No. 2002-319007, for example.